Advance Program

Here, COOL Chips 20 Tentative Program [pdf] is uploaded. (As of March 13, 2017)

 

Wed. April 19, 2017   Main Hall (7th Floor)
13:30-15:00 Special Invited Lecture 1
Chair: T. Ishihara (Kyoto Univ.)
TrueNorth: A Neurosynaptic Integrated Circuit with 1 Million Spiking Digital Neurons
Yutaka Nakamura (IBM Japan)(Abstract, Bio)
15:00-15:30 Break
15:30-17:00 Special Invited Lecture 2
Chair: T. Ishihara (Kyoto Univ.)
Low-Voltage Micro-Electrode-Dot-Array Digital Microfluidic Biochips
Tsung-Yi Ho (National Tsing Hua University, Taiwan) (Abstract, Bio)

 

Thu. April 20, 2017   Main Hall (7th Floor)
9:30-9:50 Session I: Welcome and Opening Remarks
Chair: Y. Kobayashi (NEC)
Hiroaki Kobayashi, Chair of the Organizing Committee
Hironori Kasahara, IEEE Computer Society 2017 President-Elect.
Hiromi Oohashi, President of IEICE Electronics Society
9:50-10:40 Session II: Keynote Presentation 1
Co-chairs: H. Kobayashi (Tohoku Univ.), M. Suzuki (Socionext)
The Sunway TaihuLight Supercomputer: the Design of the Processor and the System
Haohuan Fu (The National Supercomputing Center in Wuxi) (Abstract, Bio)
10:40-11:05 Session III: High Performance Processor
Chair: K. Shimamura (Hitach)
SPARC64TM XII: Fujitsu’s latest 12 core Processor for Mission Critical Servers
Takumi Maruyama (FUJITSU LIMITED)
11:05-11:25 Break
11:25-11:55 Session IV : Poster Short Speech
Chair: K. Hashimoto (Fukuoka University)
11:55-13:15 Lunch Time Break
13:15-13:35 Poster: 7th floor poster show room
13:35-14:25 Session V: Keynote Presentation 2
Co-chairs: A. Hashiguchi (Sony), K. Uchiyama (Hitachi)
New Era of Electrification and Vehicle Intelligence
Haruyoshi Kumura (Nissan Motor Co.,Ltd.) (Abstract, Bio)
14:25-15:25 Break and Poster: 7th floor poster show room
15:25-16:15 Session VI: Artificial Intelligence
Co-chairs: S. Takamaeda (Hokkaido Univ.)
An Energy-Efficient Deep Learning Processor with Heterogeneous Multi-Core Architecture for Convolutional Neural Networks and Recurrent Neural Networks
Dongjoo Shin, Jinmook Lee, Jinsu Lee and Hoi-Jun Yoo (KAIST)
Intelligence Boosting Engine (IBE): a Hardware Accelerator for Processing Sensor Fusion and Machine Learning Algorithm for a Sensor Hub SoC
Minkwan Kee, Seung-Jin Lee (Sejong University), Hyun-Su Seon, Jongsung Lee (Standing-egg Inc.) and Gi-Ho Park (Sejong University)
16:15-16:30 Break
16:30-18:00 Session VII: Panel Discussions
Topics: “Cool chips for the next decade“
Organizer / Modelator :Hideharu Amano (Keio Univ.)(Abstract)
Panelist : Tadao Nakamura (Keio Univ.), Hiroaki Kobayashi (Tohoku Univ.), Hironori Kasahara (Waseda Univ.), Yoshiaki Hagiwara (AIPS), Jeffrey L. Burns (IBM Research) and David Brash (ARM)
18:00-18:30 Break
18:30-20:30 Banquet

 

Fri, April 21, 2017   Main Hall (7th Floor)
9:30-10:20 Session VIII: Keynote Presentation 3
Co-chairs: R. Egawa (Tohoku Univ.), Y. Kobayashi (NEC)
ARM: scaling new heights
David Brash and Nigel Stephens (ARM) (Abstract, Bio)
10:20-10:40 Break and Poster
10:40-11:30 Session IX: Keynote Presentation 4
Co-chairs: T. Nakaike (IBM), Y. Sato (Tokyo Tech)
POWER9 Design Innovations
Jeffrey L. Burns (IBM Research, USA) (Abstract, Bio)
11:30-11:55 Session X: Circuits on SOI
Co-chairs: S. Izumi (Kobe Univ.), M. Ikeda (Univ.of Tokyo)
Leveraging Asymmetric Body Bias Control for Low Power LSI Design
Hayate Okuhara, Akram Ben Ahmed, Johannes Maximilian Kuehn and Hideharu Amano (Keio University)
11:55-13:35 Lunch Time Break
13:35-14:15 Session XI: Memory Architectures
Co-chairs: H. Shimada (Nagoya Univ.), S. Otani (Renesas)
An Adjacent-Line-Merging Writeback Scheme for STT-RAM Last-Level Caches
Masayuki Sato, Zentaro Sakai, Ryusuke Egawa and Hiroaki Kobayashi (Tohoku University)
An Application-adaptive Data Allocation Method for Multi-channel Memory
Takuya Toyoshima, Masayuki Sato, Ryusuke Egawa and Hiroaki Kobayashi (Tohoku University)
14:15-14:35 Break and Poster
14:35-15:25 Session XII: Image Processing
Chair: H. Matsumura (Fujitsu Labs.)
A 120 fps High Frame Rate Real-time HEVC Video Encoder with Parallel Configuration Scalable to 4K
Yuya Omori, Takayuki Onishi, Hiroe Iwasaki and Atsushi Shimizu (NTT Media Intelligence Laboratory)
A 216 GOPS Flexible WDR Image Processor for ADAS SoC
Mihir Mody, Hetul Sanghvi, Niraj Nandan, Shashank Dabral, Rajasekhar Allu, Rajat Sagar, Kedar Chitnis, Jason Jones, Brijesh Jadhav, Sujith Shivalingappa and Aish Dubey (Texas Instruments Inc.)
15:25-15:45 Break and Poster
15:45-16:50 Session XIII: Low Power SoC and Software
Chair: Y. Wada (Meisei Univ.)
Low-Power Multi-Sensor System with Task Scheduling and Autonomous Standby Mode Transition Control for IoT Applications
Masanori Hayashikoshi, Hideyuki Noda (Renesas Electronics Corporation), Hiroyuki Kawai (Tokushima Bunri University), Koji Nii and Hiroyuki Kondo (Renesas Electronics Corporation)
Body Bias Control for Renewable Energy Source with a High Inner Resistance
Keita Azegami, Hayate Okuhara and Hideharu Amano (Keio University)
An Ultra-Low-Power All-In-One 28nm CMOS SoC for Internet-of-Things
Yu Pu, Giby Samson and Chunlei Shi (Qualcomm Research)
16:50-17:00 Break
17:00-17:20 Poster Award and Closing Remarks

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