COOL Chips X
April 18 - 20, 2007
Yokohama Joho Bunka Center, Yokohama, JAPAN
April 18, 2007
Special Session 1
Chair: Koji Inoue (Kyushu University)
Novel Architectural Techniques to Mitigate Processor Errors due to Design Defects and Parameter Variation
Speaker: Josep Torrellas (University of Illinois, Urbana-Champaign, U.S.A.)
Special Session 2
Chair: Koji Inoue (Kyushu University)
Architectural Integration of Software Protection
Speaker: Gyungho Lee (University of Illinois, Chicago, U.S.A.)
April 19, 2007
Session I
Welcome and Opening Remarks
Chair: Kazumasa Suzuki (NEC)
Tadao Nakamura
Lily Jow
Keynote Presentation 1
Chair: Hajime Kubosawa (Fujitsu Labs.)
The Next Generation Supercomputer Project and Its Technical Issues
Tadashi Watanabe (RIKEN)
Session II
Chair: Michinori Nishihara (IBM)
Invited Presentation 1
A 65nm SPE for a 1 Petaflop Super Computer
Brian Flachs (IBM, U.S.A.)
Sponsored Lunch (Royal Hall Yokohama)
"Platform-Based Design with MIPS"
Realizing the benefits of best-in-class IP and ESL Alliances
(MIPS Technologies)
Session III: High-performance Computing
Chair: Yuetsu Kodama (AIST)
System Wide Software Development Tools for Heterogeneous Programming, Debug and Profiling of Mixed Multi-core and Acceleration Processors (PC invited Paper)
Ray McConnell (ClearSpeed Technology Plc., U.K.)
Power-Performance Evaluation on Ultra-Low Power High-performance
Cluster System : MegaProto/E
Takayuki Imada, Mitsushiba Sato, Yoshihiko Hotta, Hideaki Kimura, Taisuke Boku, Daisuke Takahashi, Shin’ichi Miura, and Hiroshi Nakashima (University of Tsukuba / Kyoto University)
Session IV: Poster Short Speeches
Chair: Toshinori Sato (Kyusyu University)
Poster 1 An Automatic Level Control ASK Modulator for UHF-band RFID Applications
Kyu-Sung Chae, Chang-Woo Kim (Kyung Hee University, Korea)
Poster 2 XNoTs: Crossbar-Connected Multi-Layer Topologies for 3-D NoCs
Hiroki Matsutani (Keio University), Michihiro Koibuchi (National Institute of
Informatics), Hidenori Amano (Keio University)
Poster 3 Low Power NoC Design for tiled CMP Using Zero-Efficient Scheme
Kun Huang, Jun Wang, Ge Zhang (Chinese Academy of Sciences, China)
Poster 4 A Multi-Performance Processor for Low Power Embedded Applications
Yuichiro Oyama, Tohru Ishihara, Toshinori Sato, Hiroto Yauura (Kyushu University)
Poster 5 A Fair-Sharing and Power-Aware L2 Cache System for Chip Multiprocessors
Isao Kotera, Hiroyuki Takizawa, Hiroaki Kobayashi (Tohoku University)
Poster 6 Transmission Combining Arbiter for Multiple ROP Units in 3D Graphics Accelerators
Il-San Kim, Jae-Ho Nah, Tack-Don Han (Yonsei University, Korea)
Poster 7 A Framework for Real Time Ray Tracing
Kyungho Lee (Sejong University, Korea), Sangduk Kim, Jaeho Nah, Yoon-Sig Kang (Yonsei University, Korea), Dongseok Kim (Sejong University, Korea), Sang-Won Ha, Sung-Bong Yang, Tack-Don Han (Yonsei University, Korea), Woo-Chan Park (Sejong University, Korea)
Poster 8 A Low-Power Embedded Processor with Java Hardware Interpreter
Jong-Sung Lee, Hyeong-Cheol Oh (Korea University, Korea)
Poster 9 Reverse Engineering on the Processor with Program Protection Feature
Junichi Yamashita, Takekazu Tabata, Toshiaki Kitamura (Hiroshima City
University)
Poster 10 Power Reduction Technique for Dynamically Reconfgurable Processor
Takashi Nishimura, Keiichiro Hirai (Keio University), Seidai Takeda (Shibaura Institute of Technology), Yohei Haswgawa, Satoshi Tutumi, Hedeharu Amano (Keio University), Kimiyoshi Usami (Shibaura Institute of Technology)
Poster 11 Power Consumption Reduction Method of Dynamic Optically Reconfigurable Gate Array VLSIs
Minoru Watanabe, Fuminori Kobayashi (Kyushu Institute of Technology)
Poster 12 P3 - Performance and Power Optimization Tool for Portable Embedded Systems
Yasuteru Kohda, Kohji Takano, Gang Zhang, Nobuyuki Ohba (IBM)
Poster 13 Compiler Design Techniques for Efficiently Translating Radio Protocol Description Machine Language to Hybrid Asynchronous ISA
Dipnarayan Guha, Thambipillai Srikanthan (Nanyang Technological University, Singapore)
Session V: Low-Power Cache and Circuits
Chair: Hiroaki Suzuki (Renesas Technology)
Delay Sensitivity Study on Process, Supply Voltage and Temperature Variations of Single Edge-Triggered Flip-Flops
W.L.Goh, K. S. Yeo, and M.W.Phyu (Nanyang Technological University, Singapore)
Low Static Powered Asynchronous Data Transfers Based on Current-Mode Multiple Valued Logic for GALS Systems
Myeong-Hoon Oh and Seong-Woon Kim (Electronics and Telecommunications Research Institute, Korea)
Dynamic Management Technique to Mitigate Performance Degradation for Low-Leakage Caches
Reiko Komiya, Koji Inoue, and Kazuaki Murakami (Kyushu University)
Fast Way-predicting Instruction Cache for Energy Efficiency and High Performance
Cuiping Xu and Ge Zhang (Institute of Computing Technology, Chinese Academy of Science, China)
Reduce leakage and dynamic energy in I-Cache with two-port way predictor
Zhou Hongwei, Zhang Chengyi, Zhang Minxuan, and Xing Zuocheng (National University of Defense Technology, China)
Session VI: Panel Discussions
Microprocessor for 10-Peta FLOPS Supercomputer
Organizer & Moderator: Ryutaro Himeno (RIKEN)
April 20, 2007
Session VII
Chair: Yasuo Unekawa (Toshiba)
Keynote Presentation 2
Toshiba's Strategy in Semiconductor Business and NAND Flash Memory
Shozo Saito (Toshiba)
Session VIII
Chair: Yusuke Nitta (Renesas Technology)
Invited Presentation 2
EXREAL Platform : SOC Design Challenges for Embedded Systems
Toshihiro Hattori (Renesas Technology)
Session IX: Special Applications
Chair: Fumio Arakawa (Hitachi)
Indirect Branch Validation Unit for Secure Program Execution
Y.Shi, A.Lee, G.Lee, T-J Park, T-C Jung, and B-C Kang (University of Illinois,
U.S.A.)
Toward Ubiquitous Biomedical Implantable Computing Chips - An Energy-Efficient Low-Power Architecture
Allen C. Cheng (University of Pittsburgh, U.S.A.)
Session X: Video Codec
Chair: Hideki Yamauchi (Samsung)
An 880 mW full-spec HDTV MPEG-2 CODEC LSI for prosumer HDV camera with low-power adaptive search engine
Yasuyuki Nakajima, Yutaka Tashiro, Hiroe Iwasaki, and Jiro Naganuma (NTT)
Development of a Video Encoder for a Micro-capsule Robot
Shingo Tomoda, Akihisa Furuhashi, Kaori Iida, Takayuki Murakami, Minoru Sakaida, Tomonori Izumi, and Hironori Yamauchi (Ritsumeikan University)
Session XI: Media Processing
Chair: Kiat Seng Yeo (Nanyang Tech. University, Singapore)
A Wireless Audio/Video Network Processor Capable of HD-A/V Streaming Transmission with Contents Protection
Tatsuo Shiozawa, Masanori Kuwahara, Toshio Fujisawa, Yukimasa Miyamoto, Masahiro Sekiya, Kouji Horisaki, Satoshi Kaburaki, Daisuke Taki, Keiko Shimizu, Hirotsugu Kajihara, Noriyasu Kato, Kiyotaka Matsue, Kuniaki Ito, Hiroyuki Hara, Ryouichi Bandai, Takeshi Miyaba, Shuuji Matsumoto, Keiko Seki-Fukuda, Yoshinori Watanabe, and Yasuo Unekawa (Toshiba / Toshiba Microelectronics)
Implementation and Evaluation of the Processor for Stream Multimedia
Applications using Dynamic Reconfiguration
Yutaka Yamada, Takashi Yoshikawa, and Shigehiro Asano (Toshiba)
A 2048-Point FFT Processor Based on Twiddle Factor Table Reduction
Ji-Hoon Kim and In-Cheol Park (KAIST, Korea)
Session XII: Multicore
Chair: Keiji Kimura (Waseda University)
Power Saving Innovations in the P.A. Semi PA6T core
Daniel Murray (P.A. Semi, U.S.A.)
Automatic Parallelization for Speculative Multithreading Exposing Parallelism from Sub-structures of Programs by Graph Representation
Masamichi Takagi, Taku Ohsawa, Shoji Kawahara, and Satoshi Matsushita (NEC /NEC Electronics)
Scalable Multi-Core SoC Platform for Low-Powered Architecture
Yukoh Matsumoto and Tadao Nakamura (TOPS Systems / Tohoku University)
Resource Manager to Control Temperature for Embedded SOC
Makoto Saen, Kenichi Osada, Satoshi Misaka, Tetsuya Yamada, Yoshitaka Tsujimoto, Yuki Kondoh, Tatsuya Kamei, Yutaka Yoshida, Ei Nagahama, Yusuke Nitta, Takayasu Ito, Tadashi Kameyama, and Naohiko Irie (Hitachi / Renesas Technology)
Closing Remarks
Kunio Uchiyama, Program Committee Chair (Hitachi)