Here, COOL Chips XVIII Final Program [pdf] is uploaded.

 

Monday, April 13, 2015     Main Hall(7th Floor)

13:30-14:30	Special Invited Lecture 1 Chair: T. Ishihara (Kyoto Univ.)
13:30-14:30	Adaptive Many-Core Architectures for Speed and Power Convergence in Advanced Technology Nodes Edith Beigné (CEA-LETI MINATEC) (Abstract, Bio)
14:30-14:50	Break
14:50-15:50	Special Invited Lecture 2 Chair: T. Ishihara (Kyoto Univ.)
14:50-15:50	System-Level Energy Management in Many-Core Systems Utilizing Distributed Speed-Power Controllers Anca Molnos (CEA-LETI) (Abstract, Bio)
15:50-16:10	Break
16:10-17:10	Special Invited Lecture 3 Chair: T. Ishihara (Kyoto Univ.)
16:10-17:10	Towards Open-Source Development of Autonomous Vehicles Shinpei Kato(Nagoya University, Japan) (Abstract, Bio)
17:10-17:30	Break
17:30-18:00	Special Invited Session Co-chairs: M. Ikeda (Univ. of Tokyo), F. Arakawa (Nagoya Univ.)
	Conquering the challenges of wireless small cell base stations; TI’s TCI6630K2L System on Chip (SoC) achieves low power footprint without sacrificing performance and flexibility Abhijeet Chachad(TI, USA)
	Functional Safety considerations for an ADAS System on chip Zoran Nikolic, Rama Venkatasubramanian, Aish Dubey, Rahul Gulati, Neil Simpson (TI, USA)

 

Tuesday, April 14, 2015     Main Hall(7th Floor)

9:30-9:50	Session I: Welcome & Opening Remarks Chair: H. Igura (NEC)
	Hiroaki Kobayashi, Chair of the Organizing Committee Yoshiaki Nakano, President of the Electronics Society, IEICE Yuichirou Imatomi, Director of the Economic Affairs Bureau, City of Yokohama
9:50-10:40	Session II: Keynote Presentation 1 Co-chairs: H. Igura (NEC), M. Suzuki (Socionext)
9:50-10:40	Advancing Moore’s Law: Opening New Horizons Tsuyoshi Abe (Intel, Japan) (Abstract, Bio)
10:40-10:50	Break
10:50-11:40	Session III: Keynote Presentation 2 Co-chairs: R. Egawa (Tohoku Univ.), Y. Sato (Tokyo Tech)
10:50-11:40	Data Centric Systems: Architecture and Solutions for Technical Computing, Big Data, and High Performance Analytics Michael Rosenfield (IBM Research Division)(Abstract, Bio)
11:40-11:50	Break
11:50-12:20	Session IV: Poster Short Speech Chair: K. Hashimoto (Fukuoka Univ.)
12:20-13:20	Lunch Time Break
13:20-13:40	Poster Open: 7th floor poster show room
13:40-14:20	Session V: Invited 1 Co-chairs: Y. Kobayashi (NEC), Y. Unekawa (Toshiba)
13:40-14:20	Acceleration Methods of Accurate Ego-Motion Using an Image Recognition Hardware for Advanced Driver Assistance Systems Motoki Kimura (Renesas Electronics, Japan) (Abstract, Bio)
14:20-15:00	Sessuin VI: Invited 2 Co-chairs: Y. Unekawa (Toshiba), Y. Kobayashi (NEC)
14:20-15:00	Heterogeneous Multi-Core SoC for ADAS and Image Recognition Applications Takashi Miyamori (Toshiba Corporation, Japan) (Abstract, Bio)
15:00-16:00	Break (Poster Open: 7th floor poster show room)
16:00-17:05	Session VII: Object recognition techniques Co-chairs: S. Otani (Renesas), H. Takizawa (Tohoku Univ.)
	A Keypoint-level Parallel Pipelined Object Recognition Processor with Gaze Activation Image Sensor for Mobile Smart Glasses System Injoon Hong, Dongjoo Shin, Youchang Kim, Kyeongryeol Bong, Seongwook Park, Kyuho Lee, and Hoi-Jun Yoo (KAIST)
	An Energy Efficient Hybrid FPGA-GPU based Embedded Platform to Accelerate Face Recognition Application Santhosh Kumar Rethinagiri, Oscar Palomar, Javier Arias Moreno, Osman Unsal, Adrian Cristal (BSC-Microsoft Research Centre)
	Lowering the Complexity of k-means Clustering by BFS-dijkstra method for Graph Computing Anna Zhang, Jun Yao, and Yasuhiko Nakashima (NAIST)
17:05-17:15	Break
17:15-18:45	Session VIII: Panel Discussion
17:15-18:45	Topics: Computing Technology for Autonomous Driving Organizer / Moderator: Shinpei Kato (Nagoya University, Japan) (Abstract) Panelists:Takashi Miyamori (Toshiba), Tadashi Kamada (Denso), Tsuguo Nobe (Intel), Mandali Khalesi (HERE)
18:45-19:15	Break
19:15-21:15	Banquet

 

Wednesday, April 15, 2015     Main Hall(7th Floor)

9:30-10:20	Session IX: Keynote Presentation 3 Co-chairs: K. Uchiyama (Hitachi), A. Hashiguchi (SONY)
9:30-10:20	How can Medical Electronics Revolutionise Health Care by 2050? Rudy Lauwereins (IMEC) (Abstract, Bio)
10:20-11:10	Session X: Keynote Presentation 4 Co-chairs: K. Uchiyama (Hitachi), A. Hashiguchi (SONY)
10:20-11:10	Low Power and High Speed Working Memory with Spintronics and Vertical MOSFET Technology Tetsuo Endoh (Tohoku University, Japan) (Abstract, Bio)
11:10-11:20	Break
11:20-12:05	Session XI: Low Power Circuits Chair: H. Shimada (Nagoya Univ.)
	Fined-Grained Body Biasing for Frequency Scaling in Advanced SOI Processes Johannes Maximilian K¨uhny, Hideharu Amano, Oliver Bringmannz, Wolfgang Rosenstiel (University of T¨ubingen)
	A Leakage Current Monitor Circuit Using Silicon on Thin BOX MOSFET for Dynamic Back Gate Bias Control Hayate Okuhara, Kimiyoshi Usami, Hideharu Amano (Keio Univ.)
12:05-12:45	Session XII: Low Power Processors Co-chairs: Y. Kodama (Tsukuba Univ. / Riken), K. Shimamura (Hitachi)
	Power Management on 14 nm Intel® Core™ M processor Anant Deval, Avinash Ananthakrishnan, Craig Forbell (Intel)
	0.39-V, 18.26-μW/MHz SOTB CMOS Microcontroller with Embedded Atom-Switch ROM Toshitsugu Sakamoto, Yukihide Tsuji, Munehiro Tada, Hideki Makiyama, Takumi Hasegawa, Yoshiki Yamamoto, Shinobu Okanishi, Keiichi Maekawa, Nanoki Banno1, Makoto Miyamura, Koichiro Okamoto, Noriyuki Iguchi, Yasuhiro Ogasahara, Hidekazu Oda, Shiro Kamohara, Yasushi Yamagata, Nobuyuki Sugii, and Hiromitsu Hada (LEAP)
12:45-13:50	Lunch Time Break
13:50-14:40	Session XIII: Keynote Presentation 5 Co-chairs: F. Arakawa (Nagoya Univ.), K. Nitta (NTT Electronics)
13:50-14:40	Riding the Perfect Storm, Bringing Mobile Compute to the Data Centre John Goodacre (ARM / University of Manchester, UK) (Abstract, Bio)
14:40-15:00	Break
15:00-16:00	Session XIV: System and Architecture Level Low Power Techniques Co-chairs: K.-R. Cho (Chungbuk Nat’l Univ.), M. Gondo (eSOL)
	OS-less Dynamic Binary Instrumentation for Embedded Firmware JinSeok Oh, Sungyu Kim, Eunji Jeong, Soo-Mook Moon (Seoul National University)
	An Energy-Efficient Dynamic Memory Address Mapping Mechanism Masayuki Sato, Chengguang Han, Kazuhiko Komatsu, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi (Tohoku Univ.)
	Electronic Paper Display Update Scheduler for Extremly Low Power Non-volatile Embedded Systems Yusuke Shirota, Shiyo Yoshimura, Tatsunori Kanai (Toshiba)
	A Novel Energy-efficient Data Acquisition Method for Wearable Devices Akira Takeda, Akira Yokosawa, Shintaro Sano, Shunsuke Sasaki, Takeshi Kodaka, Takahiro Tokuyoshi and Toshiki Kizu (Toshiba)
16:00-16:10	Break
16:10-16:55	Session XV: Processor Cores and NoCs Co-chairs: J. Yao (Huawei Tech.), H. Matsumura (Fujitsu Labs.)
	MIAOW – An Open Source RTL Implementation of a GPGPU Raghuraman Balasubramanian, Vinay Gangadhar, Ziliang Guo, Chen-Han Ho, Cherin Joseph, Jaikrishnan Menon Mario Paulo Drumond Robin Paul Sharath Prasad Pradip Valathol, Karthikeyan Sankaralingam (University of Wisconsin-Madison)
	An energy-efficient FPGA-based soft-core processor with configurable word size ECC arithmetic accelerator Aiko Iwasaki, Yuichiro Shibata, Kiyoshi Oguri, Ryuichi Harasawa (Nagasaki Univ.)
	TURO: A Lightweight TUrn-Guided ROuting Scheme for 3D NoCs Jun Zhou, Huawei Li, Tiancheng Wang, Ying Wang, Xiaowei Li (Chinese Academy of Sciences)
16:55-17:05	Break
17:05-17:55	Session XVI: Keynote Presentation 6 Co-chairs: H. Amano (Keio Univ.), M. Ikeda (Univ. of Tokyo)
17:05-17:55	The Kalray MPPA Mission-Critical Supercomputer on a Chip Benoît Dupont de Dinechin (Kalray) (Abstract, Bio)
17:55-18:35	Session XVII: Invited 3 Co-chairs: H. Amano (Keio Univ.), M. Ikeda (Univ. of Tokyo)
17:55-18:35	ExaScaler-1: The Power-Efficient Submersion Many-Core Processor Based Supercomputer Sunao Torii (ExaScaler / PEZY Computing, Japan) (Abstract, Bio)
18:35-18:55	Poster Award and Closing Remarks