IEEE Symposium on Low-Power and High-Speed Chips
Yokohama Joho Bunka Center, Yokohama, Japan
(Yokohama Media & Communications Center, Yokohama, Japan) on April 14 - 16, 2010
Call for Contribution
Call for Participation
Advanced Program
Organizing Committee
Program Committee
Advisory Committee
Travel Information


CALL FOR PARTICIPATION      [pdf version is here].

Keynote Presentations
"Device Cloud Computing"
Shih-Wei Liao (Google Inc., USA)
"Electrodes on Chips for Life Science Applications, Solutions for Fully-integrated Systems"
Carlotta Guiducci (EPFL, Switzerland)
"POWER7: IBM's Next Generation Server Processor"
Jim Kahle (IBM Corp., USA)
"Super Camera Technology at NHK"
Hiroshi Shimamoto (NHK Engineering Services, Inc., Japan)
"High Performance and Low Power Processor for PETA Scale Computing"
Iwao Yamazaki (Fujitsu, Japan)
"NVIDIA Tegra, Achitecture of Low Power"
Gordon Grigor (NVIDIA, USA)

Invited presentations
"Multi-Voltage Based Low Power Design Trends and Verification Techniques"
Progyna Khondkar (Nihon Synopsys, Japan)

Panel Discussion
Topics: "What is the Future Multi-layer Co-design of Computer Systems?"
organizer: Fumio Arakawa (Renesas Tech., Japan)

Special Sessions (invited lectures)
"Convergence of Design and Fabrication Technologies, a Key Enabler for Multi-layer HW-SW Integration"
Ahmed Jerraya (CEA-LETI, France)
"Achieving Fast Design Closure Using Networks on Chips"
Srinivasan Murali (EPFL/iNoCs, Switzerland)
"Resolving the Grand Paradox: Low Energy and Full Programmability in 4G Mobile Baseband SOCs"
Chris Rowen (Tensilica, USA)

Sponsored by the Technical Committees on Microprocessors and Microcomputers and Computer Architecture of the IEEE Computer Society. In cooperation with the IEICE Electronics Society, ACM SIGARCHI and IPSJ.